Renesas ’latest two new series of advanced low power SRAMs (Advanced LP SRAMs) are leading types of low power SRAMs designed to provide higher reliability and longer applications for applications such as factory automation (FA) Backup battery life for industrial equipment and smart grids. The RMLV1616A series of 16 megabit (Mb) devices and the RMWV3216A series of 32Mb devices are manufactured using the 110 nanometer (nm) process, with innovative memory cell technology, which can significantly improve reliability and help extend battery operating time.
The recent demand for highly secure and reliable user systems is driving increased demand for highly reliable SRAM, which is used to store important information such as system programs and financial transaction data. Preventing soft errors caused by alpha rays and cosmic neutron rays (Note 1) is an important issue. Typical measures to solve this problem include embedding error correction code (ECC) circuits in SRAM or user systems to correct any soft errors that occur. However, there are limitations to the error correction capability of the ECC circuit. For example, some cannot correct simultaneous errors that affect multiple bits.
Renesas Electronics' advanced LP SRAM devices use proprietary technology in their memory cells, and their soft error resistance (Note 2) is more than 500 times that of traditional Full CMOS memory cells (Note 3). The company said that this is ideal for areas requiring high reliability, including FA, measurement equipment, smart grid related equipment and industrial equipment, and many other areas such as consumer equipment, office equipment and communication equipment.
The 16 Mb RMLV1616A series is available in three packages: 48-pin FBGA, 48-pin TSOP (I), and 52-pin μTSOP (II). The 32 Mb RMWV3216A series is available in a 48-ball FBGA package. Samples of the RMLV1616A series and RMWV3216A series will be available in September. The two series are scheduled to begin mass production in October 2015. The company said that it has started mass production of Advanced LP SRAM products with 4 Mbit and 8 Mbit capacity using the 110 nm process.
(Note 1) Soft error: When alpha rays and cosmic neutron rays from external sources impinge on a silicon substrate, a charge is generated in the substrate and the information stored in the memory is lost. In contrast to reproducible hard errors, such as physical errors in semiconductor components, soft errors are not reproducible, so the system can simply rewrite data to restore the original state. In general, as manufacturing processes become more refined, soft error rates increase.
(Note 2) System soft error evaluation based on Renesas Electronics.
(Note 3) All-CMOS memory cell: A SRAM memory cell configuration in which a total of six P-channel MOS transistors and N-channel MOS transistors are formed on the same plane of a silicon substrate. Large surface area and risk of latch-up.
